Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-08-18
2000-10-31
Smith, Matthew
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438592, 438585, 438287, H01L 21336
Patent
active
061401676
ABSTRACT:
A method is presented for forming a transistor wherein a silicide layer is formed upon an impurity region of a semiconductor substrate. After forming the silicide layer, a gate structure is preferably formed upon an exposed portion of the semiconductor substrate; however, the silicide layer may be formed after forming the gate structure. In order to form the gate structure, a layer of sacrificial material is first formed above the semiconductor substrate. An opening is then patterned through the layer of sacrificial material such that a portion of the semiconductor substrate is exposed. The gate structure preferably includes a metal gate conductor and a metal oxide gate dielectric.
REFERENCES:
patent: 4683645 (1987-08-01), Naguib et al.
patent: 4731339 (1988-03-01), Ryan et al.
patent: 4992387 (1991-02-01), Tamura
patent: 5120668 (1992-06-01), Hsu et al.
patent: 5252502 (1993-10-01), Havemann
patent: 5268590 (1993-12-01), Pfiester et al.
patent: 5445977 (1995-08-01), Fujimoto
patent: 5576227 (1996-11-01), Hsu
patent: 5583067 (1996-12-01), Sanchez
patent: 5646435 (1997-07-01), Hsu et al.
patent: 5654570 (1997-08-01), Agnello
patent: 5717254 (1998-02-01), Hashimoto
patent: 5821594 (1998-10-01), Kasai
patent: 5834811 (1998-11-01), Huang
patent: 5904517 (1999-05-01), Gardner et al.
patent: 5918130 (1999-06-01), Hause et al.
patent: 5955759 (1999-09-01), Ismail et al.
patent: 5960270 (1999-09-01), Misra et al.
patent: 5970354 (1999-10-01), Hause et al.
Wolf, et al, "Silicon Processing For The VLSI Era, Voulme 1: Process Technology," Lattice Press, Snset Beach, California, 1986, pp. 384-406; and pp. 516-518.
Wolf, "Silicon Processing For The VLSI Era, Voulme 2: Process Technology," Lattice Press, Snset Beach, California, 1990, pp. 143-152.
Gardner Mark I.
Gilmer Mark C.
Hause Frederick N.
Advanced Micro Devices , Inc.
Daffer Kevin L.
Smith Matthew
Yevsikov Victor
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