High performance FET with laterally thin extension

Details High performance FET with laterally thin extension High performance FET with laterally thin extension

2007-02-13

2007-02-13

Luu, Chuong Anh (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S592000, C438S587000, C438S778000

Reexamination Certificate

active

11074223

ABSTRACT:
A field effect transistor (FET), integrated circuit (IC) chip including the FETs and a method of forming the FETs. The FETs have a device channel and a gate above the device channel with a doped source/drain extension at said each end of the thin channel. A portion of a low resistance material layer (e.g., a silicide layer) is disposed on source/drain extensions. The portions on the doped extensions laterally form a direct contact with the doped source/drain extension. Any low resistance material layer on the gate is separated from the low resistance material portions on the source/drain extensions.

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