High performance extended data out

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365191, 36518907, 36523008, G11C 700

Patent

active

054901146

ABSTRACT:
A high performance latch for read and write operations in RAM having a Complimentary Interlock circuit that eliminates the need for external timing to the RAM which might limit its high performance operation. For both read and write operations, the complementary interlock circuit extends a latching signal until valid data appears on the read or write data lines, thus preventing a valid data miss.

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