High performance DRAM structure employing multiple thickness gat

Details High performance DRAM structure employing multiple thickness gat High performance DRAM structure employing multiple thickness gat

1999-11-01

2000-08-01

Nelms, David

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365205, G11C 1604

Patent

active

060976411

ABSTRACT:
A DRAM device having improved performance of peripheral circuitry is described. The performance is improved by selectively having MOS transistors with a thinner gate oxide in peripheral circuits having a lower voltage applied to their gate electrodes. The DRAM device will maintain reliability by having MOS transistors with a thicker gate oxide in the memory cells and selected peripheral circuitry that are subjected to a higher voltage at their gate electrodes. Further this invention describes methods of fabricating the DRAM device with selectively placed multiple gate oxide thickness.

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H.Ishiuchi et al."Embedded DRAM Technologies",IEDM '97 p 33-36.

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