High-K/metal gate CMOS finFET with improved pFET threshold...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S151000, C438S216000

Reexamination Certificate

active

07993999

ABSTRACT:
A device and method for fabrication of fin devices for an integrated circuit includes forming fin structures in a semiconductor material of a semiconductor device wherein the semiconductor material is exposed on sidewalls of the fin structures. A donor material is epitaxially deposited on the exposed sidewalls of the fin structures. A condensation process is applied to move the donor material through the sidewalls into the semiconductor material such that accommodation of the donor material causes a strain in the semiconductor material of the fin structures. The donor material is removed, and a field effect transistor is formed from the fin structure.

REFERENCES:
Tezuka, T., et al., “Dislocation-Free Formation of Relaxed Sige-On-Insulator Layers”, Applied Physics Letters. vol. 80, No. 19. May 2002. pp. 3560-3562.

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