High-K gate dielectric defect gettering using dopants

Details High-K gate dielectric defect gettering using dopants High-K gate dielectric defect gettering using dopants

2006-03-21

2006-03-21

Luu, Chuong Anh (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S003000

Reexamination Certificate

active

07015088

ABSTRACT:
One or more aspects of the present invention relate to forming a transistor while passivating electrically active defects associated with a top portion of a layer of high-k dielectric material. The layer of high-k dielectric material is utilized to establish a high-k gate dielectric in the transistor. A gate electrode layer is formed over the layer of high-k dielectric material, and is patterned to form a gate structure that includes a gate electrode and the high-k gate dielectric. The electrically active defects are passivated utilizing materials containing dopants that are attracted to and neutralize the defects. The passivated defects thus do not interfere with other transistor doping processes (e.g., forming source and drain regions) and do not adversely affect resulting semiconductor device performance, reliability and yield.

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