High-density three-dimensional memory

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S316000, C257S530000, C438S257000, C438S593000

Reexamination Certificate

active

06995422

ABSTRACT:
An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably comprising two diode portions and an antifuse, then filling and planarizing; and continuing to form conductors and semiconductor elements in multiple stories of memories. The arrangement of processing steps and the choice of materials decreases aspect ratio of each memory cell, improving the reliability of gap fill and preventing etch undercut.

REFERENCES:
patent: 6034882 (2000-03-01), Johnson et al.
patent: 6111784 (2000-08-01), Nishimura
patent: 6483736 (2002-11-01), Johnson et al.
patent: 6515888 (2003-02-01), Johnson et al.
patent: 6525953 (2003-02-01), Johnson
patent: 6567301 (2003-05-01), Anthony et al.
patent: 6584029 (2003-06-01), Tran et al.
patent: 6642603 (2003-11-01), Knall
patent: 2002/0028541 (2002-03-01), Lee et al.

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