Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-05-12
1999-12-07
Fahmy, Wael M.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438561, 438700, H01L 21336
Patent
active
059982632
ABSTRACT:
A compact nonvolatile programmable memory cell. The memory cell has a floating gate (118), control gate (123), drain (108), and source regions (112). The memory cell is an electrically erasable programmable read only memory (EEPROM) cell or a Flash memory cell. Data may be stored the memory cell of the present invention for the required lifetime of the memory cell usage, and data is retained even when power is removed. The memory cell of the present invention has a substantially transverse or vertical channel (140), relative to a surface of a substrate. The memory may be used to create very high-density memory arrays.
REFERENCES:
patent: 4929988 (1990-05-01), Yoshikawa
patent: 5078498 (1992-01-01), Kadakia et al.
patent: 5135879 (1992-08-01), Richardson
patent: 5146426 (1992-09-01), Mukherjee et al.
patent: 5258634 (1993-11-01), Yang
patent: 5281548 (1994-01-01), Prall
patent: 5315142 (1994-05-01), Acovic et al.
patent: 5330920 (1994-07-01), Soleimani et al.
patent: 5338953 (1994-08-01), Wake
patent: 5343063 (1994-08-01), Yuan et al.
patent: 5380672 (1995-01-01), Yuan et al.
patent: 5386132 (1995-01-01), Wong
patent: 5429970 (1995-07-01), Hong
patent: 5476801 (1995-12-01), Keshtbod
patent: 5479368 (1995-12-01), Keshtbod
patent: 5486714 (1996-01-01), Hong
patent: 5494383 (1996-02-01), Chang et al.
patent: 5506431 (1996-04-01), Thomas
patent: 5534456 (1996-07-01), Yuan et al.
patent: 5576567 (1996-11-01), Mori
patent: 5587340 (1996-12-01), Yamazaki
patent: 5675161 (1997-10-01), Thomas
patent: 5717635 (1998-02-01), Akatsu
patent: 5780341 (1998-07-01), Ogura
patent: 5835409 (1998-11-01), Lambertson
Kim, et al., "A Novel Dual String NOR (DuSNOR) Memory Cell Technology Scalable to the 256 Mbit and 1Gbit Flash Memories," IEEE 0-7803-2700-4, IEDM 95, pp. 263-266 (1995).
Yamauchi, et al., "A New Cell Structure for Sub-quarter Micron High Density Flash Memory," IEEE 0-7803-2700-4, IEDM 95, pp. 267-269 (1995).
Aritome, et al., "A Novel Side-Wall Transfer-Transistor Cell (SWaTT Cell) for Multi-Level NAND EEPROMs," IEEE 0-7803-2700-4, IEDM 95, pp. 275-278 (1995).
Hanafi, et al., "A Scalable Low Power Vertical Memory," IEEE 0-7803-2700-4, IEDM 95, pp. 657-660 (1995).
Madurawe Raminda U.
Sekariapuram Seshan
Altera Corporation
Coleman William David
Fahmy Wael M.
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