Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-10-29
2000-02-29
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438269, H01L 21336
Patent
active
060308702
ABSTRACT:
A MOS technology power device comprises a semiconductor material layer of a first conductivity type, a plurality of elementary functional units, a first insulating material layer placed above the semiconductor material layer and a conductive material layer placed above the first insulating material layer. Each elementary functional unit includes an elongated body region of a second conductivity type formed in the semiconductor material layer. Each elementary functional unit further includes a first elongated window in the conductive material layer extending above the elongated body region. Each elongated body region includes a source region doped with dopants of the first conductivity type, intercalated with a portion of the elongated body region wherein no dopant of the first conductivity type are provided. The MOS technology power device further includes a second insulating material layer disposed above the conductive material layer and disposed along elongated edges of the first elongated window. The second insulating material layer includes a second elongated window extending above each elongated body region. The second insulating material layer seals the edges of the conductive material layer from a source metal layer disposed over the second insulating material layer. The source metal layer contacts each body region and each source region through each second elongated window along the length of the elongated body region.
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Ferla Giuseppe
Frisina Ferruccio
Magri Angelo
Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
Lebentritt Michael S.
Niebling John F.
SGS-Thomson Microelectronics S.R.L.
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