High density memory and multiplexer control circuit for use...

Details High density memory and multiplexer control circuit for use... High density memory and multiplexer control circuit for use...

2006-12-05

2006-12-05

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S190000, C365S230020, C365S230060

Reexamination Certificate

active

07145810

ABSTRACT:
A high density memory is disclosed wherein multiple memory cells are placed in a single cell region. To accommodate the multiple memory cells, multiple bit lines are provided. Also provided is a multiplexer circuit that is coupled to the multiple bit lines. When the memory cells in a region are activated by a common word line, they put their stored data bits onto the multiple bit lines. The multiplexer circuit then selects one of the bit lines, and provides the data bit on that bit line to a latch. In one implementation, the multiplexer circuit comprises a plurality of bit line circuits, and each bit line circuit comprises a precharge circuit, a precharge control circuit, a data sensing circuit, and a sensing control circuit. These components of the bit line circuits help to ensure that the memory operates effectively and without data corruption.

REFERENCES:
patent: 6137730 (2000-10-01), Chien
patent: 6363023 (2002-03-01), Andersen et al.

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