High-density integrated circuitry for semiconductor memory

Details High-density integrated circuitry for semiconductor memory High-density integrated circuitry for semiconductor memory

2010-02-26

2011-11-01

Pizarro, Marcos D. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE27084

Reexamination Certificate

active

08049260

ABSTRACT:
Processes are disclosed which facilitate improved high-density memory circuitry, most preferably dynamic random access memory (DRAM) circuitry. A semiconductor memory device includes i) a total of no more than 68,000,000 functional and operably addressable memory cells arranged in multiple memory arrays formed on a semiconductor die; and ii) circuitry formed on the semiconductor die permitting data to be written to and read from one or more of the memory cells, at least one of the memory arrays containing at least 100-square microns of continuous die surface area having at least 128 of the functional and operably addressable memory cells, more preferably, at least 100 square microns of continuous die surface area having at least 170 of the functional and operably addressable memory cells.

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