High-density 3-dimensional resistors

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S597000, C257SE21579

Reexamination Certificate

active

07488682

ABSTRACT:
Interconnect, i.e., BEOL structures comprising at least one thin film resistor that is located at the same level as that of a neighboring conductive interconnect are provided. The present invention also provides a method of fabricating such interconnect structures utilizing processing steps that are compatible with current interconnect processing. Moreover, the inventive method of the present invention provides better technology extendibility in terms of higher density than prior art schemes.

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patent: 6083785 (2000-07-01), Segawa et al.
patent: 6207560 (2001-03-01), Lee
patent: 6232042 (2001-05-01), Dunn et al.
patent: 2004/0027234 (2004-02-01), Hashimoto et al.
patent: 2006/0012052 (2006-01-01), McDevitt et al.
patent: 2006/0163730 (2006-07-01), Matsumoto et al.
patent: 2006/0192286 (2006-08-01), Kanamura
patent: 2007/0040276 (2007-02-01), Yang et al.

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