Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2001-02-28
2002-10-22
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S723000, C257S700000, C257S713000, C257S712000, C257S737000, C257S758000, C361S790000, C361S735000, C361S764000, C361S803000
Reexamination Certificate
active
06469375
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a pedestal connector for densely packing memory modules and other electronic modules in a multi-module, three-dimensional stack, and more particularly to a stack of pedestal connectors that has a novel connector pattern, repeated in each pedestal connector, to provide conductive paths both unique and common to each memory module.
TRADEMARKS
S/390 and IBM are registered trademarks of International Business Machines Corporation, Armonk, N.Y., U.S.A. and Lotus is a registered trademark of its subsidiary Lotus Development Corporation, an independent subsidiary of International Business Machines Corporation, Armonk, N.Y. Other names may be registered trademarks or product names of International Business Machines Corporation or other companies.
BACKGROUND
In certain applications, such as high performance emulator applications, it is desirable to have a large memory capacity comprised of chips or off-the-shelf memory modules with high-speed, wide band input/output access to each memory module. At the same time, space and signal path length considerations call for a small footprint on the ceramic or other substrate which carries the input/output signal lines to the memory modules. Stacking the memory modules in three dimensions can provide a small footprint, but a custom design for mechanically supporting and providing unique signal path connections would be cost prohibitive for many applications. Stacking memory components has in the prior art required special hardware, i.e. card on board, metal straps for conductors, or modifications to chip technology. The prior art attempted to develop and manufacture such stacked memories. But these attempts have not been successful in the area of Ball Grid Array type memory or module stacking. This invention is a novel approach to this problem. It allows the memory modules to be stacked and also allows these stacks to be included in Application Specific Integrated Circuit (ASIC) Multi-Chip Modules (MCM's).
SUMMARY OF THE INVENTION
An object of this invention is the provision of a pedestal connector that can be replicated at each level of a three-dimensional stack of modules. Each pedestal connector provides signal paths both common and unique to modules at its level and signal paths that match signal paths from a pedestal connector at the level below with a signal path in a pedestal connector at the level above to provide further unique paths.
Another object of this invention is the provision of a pedestal connector that is economical to produce and to use.
Briefly, this invention contemplates the provision of a three-dimensional memory module in which a repetitively used pedestal connector provides signal paths unique and common to the module at its level and signal paths from the level below unique to and common to modules at levels above. In order to provide a unique signal path from a substrate to each memory module, while using identical pedestal connectors at each level, signal lines are skewed from where they enter the bottom surface of the pedestal connector to where they exit the top surface. For example, each input in a line of inputs is connected to a matching line of outputs, but with a shift of one position between input and output.
REFERENCES:
patent: 5239448 (1993-08-01), Perkins et al.
patent: 5579207 (1996-11-01), Hayden et al.
patent: 5995379 (1999-11-01), Kyougoku et al.
Beausoleil William F.
Blackshear Edmund D.
Ellsworth, Jr. Michael J.
Shutler William F.
Tomassetti Norton J.
Costanzo Patricia M.
Thomas Tom
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