Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-11-14
2002-03-19
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S386000
Reexamination Certificate
active
06359300
ABSTRACT:
TECHNICAL FIELD
The present invention relates to methods for filing trenches in semiconductor substrates and, more specifically, to a method for achieving void-free fill of deep trench capacitors having high aspect ratios.
BACKGROUND OF THE INVENTION
In the monolithic integrated circuit technology, capacitors are a common element. Large numbers of capacitors, each associated with a Field Effect Transistor (FET), are required in Dynamic Random Access Memory (DRAM) chips. As the requirement for additional memory capacity has increased, so has the requirement for packing the capacitors at higher and higher densities. The original planar capacitor design, which creates a capacitor on the chip surface, occupies too much of the chip surface per capacitor. Capacitor designs which form the capacitors in trenches in the silicon wafer permit higher capacitor densities and are the trend for the future.
Trench capacitors require, however, deep and narrow trenches having a very high aspect ratio—often more than 40:1. Typically, trench capacitors are formed in the trench by depositing a dielectric layer on the trench walls and filling the trench with a doped polysilicon layer to form the upper capacitor plate. A doped silicon trench wall area forms the lower capacitor plate.
Trenches having an aspect ratio greater than 4:1 are generally considered to have a high aspect ratio. As deep trench aspect ratios exceed about 10:1, filling the trench becomes more and more difficult. The top portion of the trench tends to receive more deposition, thereby blocking diffusion of reactants to the bottom portion of the trench. Often, the result is the creation of voids within the fill. Such voids increase buried plate series resistance. Once the trench is filled with silicon, the voids do not disappear with additional processing. In fact, the voids may get larger as the wafers go through the various anneal cycles, especially for amorphous silicon fill.
In addition to trenches having a substantially rectangular cross section, trench structures having a bottle-shaped cross section with a narrower opening at the top than at the bottom of the trench are also used. It is theoretically impossible to completely fill such bottle-shaped trenches with a single deposition step.
To assure more complete fill of trench structures, a lower deposition temperature has been used at the expense of reduced deposition rates and longer processing times. Multiple deposition steps may be necessary, especially for bottle-shaped trenches, including etching steps between depositions to re-open the top of the trench and allow penetration of additional fill material into the trench. Such multiple steps complicate the processing sequence.
Thus, a need exists for a more practical method to fill such deep or odd-shaped trenches.
SUMMARY OF THE INVENTION
To meet this and other needs, and in view of its purposes, the present invention provides a process for making a trench capacitor in a high aspect ratio trench in a silicon wafer. The trench has an opening, opposite sidewalls, an upper portion, a lower portion, and a bottom. The silicon wafer has a top surface. The process comprises the following steps:
a) depositing a fill layer over the top surface of the wafer and in the trench, the fill layer comprising a material selected from the group consisting of germanium and silicon-germanium alloy; and
b) heating the fill layer material to a temperature equal to or above the fill layer material melting temperature and below the wafer melting temperature while preventing oxidation of the fill layer material.
The process is also applicable to fill odd-shaped trenches such as bottle-shaped trenches. Although the process is particularly useful in forming trench capacitors, it is also useful in filling trenches used as contact vias where such trenches again have aspect ratios comparable to the aspect ratios of the capacitor trenches. In all such applications, the germanium or silicon-germanium alloys are doped to provide the needed low resistivity.
The process is best carried out under vacuum or under inert gas to prevent exposure of the fill layer to ambient air. Preferably, the process further comprises, following step (a), the step of depositing a cap layer on top of the fill layer capable of preventing such exposure. The cap layer is a layer of silicon.
The process results in a high-aspect-ratio, straight-wall or bottle-shaped trench structure filled completely with a fill material selected from the group consisting of germanium and silicon-germanium alloy. The fill material is doped with a conductive material. The If trench may further comprise a buffer layer and a metal layer, and/or a thermal-stress-reduction layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
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Economikos Laertis
Park Byeongju
Anderson, Esq. Jay H.
Hoang Quoc
International Business Machines - Corporation
Nelms David
Ratner & Prestia
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