Hierarchically-controlled automatic test pattern generation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C703S013000

Reexamination Certificate

active

07139955

ABSTRACT:
Hierarchically-controlled automatic test pattern generation (ATPG) is provided. One embodiment comprises a method for automatically generating test patterns for testing a device under test. Briefly described, one such method comprises the steps of: receiving a hierarchical model of a device under test, the hierarchical model comprising at least one low-level design component and at least one high-level design component which contains the low-level design component; selecting a fault to be detected in the device under test; and performing an automatic test pattern generation (ATPG) algorithm on the design components based on the hierarchy of the hierarchical model.

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