Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-06-02
2010-10-26
Lin, Sun J (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07823116
ABSTRACT:
In embodiment of the invention, a method of synthesizing a layout of an integrated circuit chip including analog circuitry is disclosed. The method includes receiving a circuit netlist of an integrated circuit chip including analog circuitry; representing and manipulating a hierarchical analog circuit layout including device placement and net routing in response to the circuit netlist, the hierarchical analog circuit layout including a plurality of levels of layout hierarchy; and passing layout information from one level of the layout hierarchy to an adjacent level of the layout hierarchy to synthesize the layout of the integrated circuit chip.
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Office Action for U.S. Appl. No. 11/757,350; Paul Dinh, Apr. 19, 2010; 8 pages.
Alford William E.
Alford Law Group, Inc.
Lin Sun J
SynCira Corporation
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