Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-23
2007-10-23
Hoang, Quoc (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S312000, C257S197000, C257SE21372, C257SE21387, C257SE29033
Reexamination Certificate
active
11507008
ABSTRACT:
In the method for manufacturing a heterojunction bipolar transistor, a collector contact layer, a collector layer, a base layer, a base protection layer, an emitter layer, an emitter contact layer, and a WSi layer are sequentially formed on a substrate. A resist pattern is then formed on the WSi layer, and the WSi layer is patterned by using the resist pattern as a mask. Thereafter, the emitter contact layer and the emitter layer are sequentially removed by ICP (Inductively Coupled Plasma) dry etching by using the resist pattern as a mask.
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patent: 6683332 (2004-01-01), Shinozaki et al.
patent: 6803248 (2004-10-01), Sadaka et al.
patent: 2005/0035370 (2005-02-01), Chen
patent: 5-109756 (1993-04-01), None
patent: 11-186278 (1999-07-01), None
Takeda Hidenori
Tambo Toshiharu
Hoang Quoc
Matsushita Electric - Industrial Co., Ltd.
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