Heat sink with collapse structure and semiconductor package...

Details Heat sink with collapse structure and semiconductor package... Heat sink with collapse structure and semiconductor package...

2001-09-05

2003-03-25

Chaudhuri, Olik (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S707000, C257S787000

Reexamination Certificate

active

06538321

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to heat sinks and semiconductor packages with the heat sinks, and more particularly, to a heat sink with a collapse structure and a semiconductor package with the heat sink, in which a semiconductor chip is not damaged during a molding process.
BACKGROUND OF THE INVENTION
In the technology development for fabricating a semiconductor package, leads used as I/O connections are increasingly disposed in number and density in the semiconductor package. Further, due to enhancement in integrated circuit performance for a semiconductor chip, heat generated by the chip is accordingly increased. Therefore, it is critical for the heat to be effectively dissipated to the atmosphere, so as to assure the quality of the chip and semiconductor package.
In order to solve the heat dissipating problem for the semiconductor package, conventionally a heat sink or heat block made of conductive metal such as copper or aluminum is applied to the semiconductor package, or alternatively, cooled air or liquid is passed through a surface of the semiconductor package, so as to allow the heat generated by the chip to be effectively and rapidly dissipated to the atmosphere. Moreover, shortening a heat dissipating path is advantageous for improving heat dissipating efficiency. That is, if the semiconductor package is constructed in a manner that, the heat spreader or heat block comes into direct contact with the chip and has a surface thereof exposed to outside of an encapsulant in the semiconductor package, the shortest heat dissipating path can be achieved, and thus the heat dissipating efficiency can be effectively improved.
U.S. Pat. No. 5,851,337 provides a semiconductor package with an exposed heat sink. As shown in
FIG. 1
, this semiconductor package comprises a substrate
1
; a semiconductor chip
2
mounted on the substrate
1
; a plurality of conductive elements
3
such as gold wires for electrical connecting the substrate
1
to the chip
2
; and an exposed heat sink
4
attached to the substrate
1
and the chip
2
respectively by means of an adhesive
6
; an encapsulant
5
for encapsulating the substrate
1
, the chip
2
, the conductive elements
3
and the heat sink
4
; and a plurality of solder balls
7
implanted on an exposed surface of the substrate
1
. As the heat sink
4
is in direct contact with the chip
2
, heat generated by the chip
2
can be easily dissipated through an exposed surface of the heat sink
4
to the atmosphere or to a heat dissipating device (not shown), such as a heat pipe or fan, externally attached to the exposed surface of the heat sink
4
. This therefore makes the semiconductor package significantly improved in heat dissipating efficiency.
However, in a molding process for the semiconductor package disclosed in the foregoing U.S. Pat. No. 5,851,337, as shown in
FIG. 2
, it occurs that the heat sink
4
is pressed by an upper mold
8
a
and a lower mold
8
b
during engaging the molds, due to the heat
4
having a height greater than a depth of a molding cavity. This then makes the chip
2
pressed by the heat sink
4
, and eventually results in damage or cracks
9
on the chip
2
. In this case, the package quality and fabrication cost are undesirably affected. The reason for the heat sink
4
excessive in height is that the adhesive
6
used for attaching the heat sink
4
to both the substrate
1
and the chip
2
is hardly controlled in thickness. That is, if the adhesive
6
is made too thick, then the height of the heat sink
4
will exceed the depth of the molding cavity. Besides, dimensional inaccuracy in manufacture for the heat sink
4
can also lead to the heat sink
4
higher in elevation than the depth of the molding cavity.
SUMMARY OF THE INVENTION
A primary objective of the present invention is to provide a heat sink with a collapse structure and a semiconductor package with the heat sink, in which heat dissipating efficiency can be effectively improved, and a semiconductor chip can be prevented from being damaged in a molding process due to an adhesive excess in amount for attaching the heat sink to the chip, or due to dimensional inaccuracy in fabrication for the heat sink.
In accordance with the foregoing and other objectives, a heat sink with a collapse structure is proposed in the invention, comprising a body having at least one surface exposed to outside of an encapsulant of a semiconductor package, and at least one extending portion extending from a bottom surface of the body inwardly and then bending downwardly to a position for attaching a semiconductor chip thereto. In this case, the heat sink is in the form of a ladder-like structure due to a difference in height formed between the extending portion and the body. Accordingly, in a molding process for the semiconductor package having the heat sink, the height difference of the heat sink allows the extending portion to produce collapse deformation without causing damage to the semiconductor chip. Further, heat generated by the semiconductor chip can pass through the extending portion to the body of the heat sink, so as to dissipate the heat through the exposed surface of the body to the atmosphere or to a heat dissipating device externally connected to the exposed surface. This therefore effectively improves heat dissipating efficiency for the semiconductor package.
In addition, at side edges on the exposed surface of the heat sink there can also be optionally formed at least one ladder-like recess. This allows a molding compound used in the molding process to be significantly reduced in fluidity and then retained in the recess, so as to prevent the molding compound from flashing on the exposed surface of the heat sink, and thus the quality of the semiconductor package can be assured.


REFERENCES:
patent: 5105259 (1992-04-01), McShane et al.
patent: 5552635 (1996-09-01), Kim et al.
patent: 5616957 (1997-04-01), Kajihara
patent: 5851337 (1998-12-01), Chen
patent: 5859471 (1999-01-01), Kuraishi et al.
patent: 5872395 (1999-02-01), Fujimoto
patent: 5909056 (1999-06-01), Mertol
patent: 6046498 (2000-04-01), Yoshikawa
patent: 6111322 (2000-08-01), Ando et al.
patent: 6114761 (2000-09-01), Mertol et al.
patent: 6211563 (2001-04-01), Tzu
patent: 6219243 (2001-04-01), Ma et al.

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