Hardmask manufacture in ferroelectric capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S396000, C257SE21648

Reexamination Certificate

active

07811882

ABSTRACT:
A method of manufacturing a semiconductor device. The method comprises fabricating a ferroelectric capacitor. The capacitor's fabrication includes forming conductive and ferroelectric material layers on a semiconductor substrate, forming a hardmask layer on the conductive and ferroelectric material layers, forming an organic bottom antireflective coating layer on the hardmask layer, and, patterning the organic bottom antireflective coating layer. Seasoning in a hardmask etching chamber is substantially unaffected by the patterning.

REFERENCES:
patent: 6500678 (2002-12-01), Aggarwal et al.
patent: 6569777 (2003-05-01), Hsu et al.
patent: 7220600 (2007-05-01), Summerfelt et al.
patent: 7250349 (2007-07-01), Celii et al.
patent: 2004/0043526 (2004-03-01), Ying et al.
patent: 2006/0134808 (2006-06-01), Summerfelt et al.
patent: 2008/0311683 (2008-12-01), Wang
U.S. Appl. No. 12/025,207, filed Feb. 4, 2008, entitled “An Improved Ferroelectric Capacitor Manufacturing Process”; to Francis Gabriel Celii, et al.

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