Handling of the transmit enable signal in a dynamic random...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Reexamination Certificate

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10970458

ABSTRACT:
A method, an apparatus, and a computer program are provided for controlling a transmission enable (TX_ENA) signal. In Extreme Data Rate (XDR™) Dynamic Random Access Memories (DRAMs) or XDRAMS, there is a requirement that a TX_ENA signal remain logic high for a few cycles before data transmission, and, when TX_ENA transitions to logic low, TX_ENA remain logic low for a few cycles. However, maintaining this timing can be difficult with back-to-back writes. Therefore, additional logic is employed within XDRAM memory controllers to insure that TX_ENA does not violate system requirements by allowing TX_ENA to remain logic high between successive writes or when the system is devoid of commands.

REFERENCES:
patent: 5884067 (1999-03-01), Storm et al.
patent: 6151658 (2000-11-01), Magro
patent: 6295593 (2001-09-01), Hsu et al.
patent: 6421754 (2002-07-01), Kau et al.
patent: 2006/0123187 (2006-06-01), Bellows et al.

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