Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2002-10-07
2008-11-11
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S600000
Reexamination Certificate
active
07451337
ABSTRACT:
A method and apparatus for guaranteeing clock edge synchronization is disclosed. In one embodiment, a system for synchronizing clock signals includes a clock unit and a synchronization unit. Both the clock unit and the synchronization unit may be configured to receive a reference clock signal. The clock unit may be configured to drive a plurality of domain clock signals to various clock domains. The synchronization unit may be configured to assert a synchronization pulse once every N reference clock cycles. Clock edges of the domain clock signals may be aligned with each other responsive to asserting the synchronization pulse.
REFERENCES:
patent: 5450458 (1995-09-01), Price et al.
patent: 5606276 (1997-02-01), McClintock
patent: 5744991 (1998-04-01), Jefferson et al.
patent: 6047383 (2000-04-01), Self et al.
patent: 6208180 (2001-03-01), Fisch et al.
patent: 6268749 (2001-07-01), Fisch et al.
patent: 6516362 (2003-02-01), Magro et al.
Advanced Micro Devices , Inc.
Heter Erik A.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Perveen Rehana
Stoynov Stefan
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