Ground-signal-ground pad layout for device tester structure

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

Reexamination Certificate

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Details

C438S014000, C438S017000, C438S018000

Reexamination Certificate

active

06878964

ABSTRACT:
A tester for a semiconductor device is provided, which includes a bottom ground pad structure, an intermediate ground pad structure, and a top layer. The bottom ground pad structure is electrically connected to a substrate. The bottom ground pad structure includes a bottom signal shield plate. The intermediate ground pad structure is electrically connected to the bottom ground pad structure. The intermediate ground pad structure is located over the bottom ground pad structure. The top layer is located over the intermediate ground pad structure. The top layer includes a device under test (DUT), a ground probe pad, a signal probe pad, and leads. The DUT is electrically connected to the ground probe pad and the signal probe pad via the leads. The ground probe pad is electrically connected to the intermediate ground pad structure. The signal probe pad is located over the bottom signal shield plate.

REFERENCES:
patent: 6194739 (2001-02-01), Ivanov et al.
patent: 6211541 (2001-04-01), Carroll et al.

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