Grain growth promotion layer for semiconductor interconnect...

Details Grain growth promotion layer for semiconductor interconnect... Grain growth promotion layer for semiconductor interconnect...

2006-02-21

2010-02-23

Lebentritt, Michael S (Department: 2829)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S638000, C438S674000, C438S681000, C438S685000, C438S687000, C257S175000, C257S226000, C257S252000, C257S311000, C257S576000, C257S577000, C257S579000, C257S585000, C257S591000, C257S648000

Reexamination Certificate

active

07666787

ABSTRACT:
An interconnect structure of the single or dual damascene type and a method of forming the same, which substantially reduces the electromigration problem that is exhibited by prior art interconnect structures, are provided. In accordance with the present invention, a grain growth promotion layer, which promotes the formation of a conductive region within the interconnect structure that has a bamboo microstructure and an average grain size of larger than 0.05 microns is utilized. The inventive structure has improved performance and reliability.

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