Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
2000-12-01
2003-12-02
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S632000
Reexamination Certificate
active
06657284
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods for forming dielectric layers within microelectronic fabrications.
More particularly, the present invention relates to methods for forming graded dielectric layers within microelectronic fabrications.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronic conductor layers which are separated by microelectronic dielectric layers.
As microelectronic fabrication integration levels have increased and microelectronic device and patterned microelectronic conductor layer dimensions have decreased, it has become increasingly common in the art of microelectronic fabrication to employ interposed between the patterns of patterned microelectronic conductor layers when fabricating microelectronic fabrications microelectronic dielectric layers formed of comparatively low dielectric constant dielectric materials having dielectric constants in a range of from about 2.0 to about 4.0. For comparison purposes, microelectronic dielectric layers formed within microelectronic fabrications from conventional silicon oxide dielectric materials, silicon nitride dielectric materials and silicon oxynitride dielectric materials typically have comparatively high dielectric constants in a range of from about 4.0 to about 8.0.
Microelectronic dielectric layers formed of comparatively low dielectric constant dielectric materials are desirable in the art of microelectronic fabrication formed interposed between the patterns of patterned microelectronic conductor layers within microelectronic fabrications insofar as such microelectronic dielectric layers formed of dielectric materials having comparatively low dielectric constants provide microelectronic fabrications which may theoretically operate at higher microelectronic fabrication speeds, with attenuated patterned microelectronic conductor layer parasitic capacitance and attenuated patterned microelectronic conductor layer cross-talk.
Of the comparatively low dielectric constant dielectric materials which may be employed for forming microelectronic dielectric layers within microelectronic fabrications, carbon doped silicon containing dielectric materials, such as carbon doped silicon oxide dielectric materials, are presently of interest. Carbon doped silicon containing dielectric materials, such as carbon doped silicon oxide dielectric materials, are presently of considerable interest insofar as carbon doped silicon containing dielectric materials may be formed employing chemical vapor deposition (CVD) methods and plasma enhanced chemical vapor deposition (PECVD) methods as are generally otherwise conventional in the art of microelectronic fabrication, but with appropriate modification of source materials and/or deposition parameters such as to provide when forming a microelectronic dielectric layer within a microelectronic fabrication a carbon doped silicon containing dielectric material rather than a conventional silicon containing dielectric material.
While carbon doped silicon containing dielectric materials, such as carbon doped silicon oxide dielectric materials, are thus desirable in the art of microelectronic fabrication for forming microelectronic dielectric layers within microelectronic fabrications, carbon doped silicon containing dielectric materials are in turn nonetheless also not entirely without problems in the art of microelectronic fabrication for forming microelectronic dielectric layers within microelectronic fabrications. In that regard, it has been observed in the art of microelectronic fabrication that carbon doped silicon containing dielectric materials when employed for forming microelectronic dielectric layers within microelectronic fabrication often provide substrate surfaces upon which it is difficult to adhere additional microelectronic layers formed within a microelectronic fabrication.
It is thus desirable in the art of microelectronic fabrication to provide microelectronic dielectric layers formed of carbon doped silicon containing dielectric materials, such as carbon doped silicon oxide dielectric materials, having comparatively low dielectric constants, while also providing the microelectronic dielectric layers with enhanced adhesion as substrate layers upon which may be formed additional layers within a microelectronic fabrication.
It is towards the foregoing object that the present invention is directed.
Various methods and materials have been disclosed in the art of microelectronic fabrication for forming microelectronic layers, and in particular microelectronic dielectric layers, with desirable properties in the art of microelectronic fabrication.
For example, Hochberg et al., in U.S. Pat. No. 4,992,306, disclose a low pressure chemical vapor deposition (LPCVD) method for forming, at a comparatively low deposition temperature of from about 325 to about 700 degrees centigrade, and with a comparatively high deposition rate, a silicon oxide dielectric layer, a silicon nitride dielectric layer or a silicon oxynitride dielectric layer within a microelectronic fabrication. In order to realize the foregoing object, the low pressure chemical vapor deposition (LPCVD) method employs in conjunction with an oxidant source material a silicon source material comprising a two or greater carbon atom content alkylazidosilane, arylazidosilane or alkylarylazidosilane.
In addition, Yau et al., in U.S. Pat. No. 6,072,227, disclose, in conjunction with a microelectronic structure resulting therefrom, a method for forming, with enhanced barrier properties and with enhanced etch stop properties, a microelectronic dielectric layer formed of a lower dielectric constant dielectric material within a microelectronic fabrication. In order to realize the foregoing object, the method employs when forming the microelectronic dielectric layer a plasma enhanced chemical vapor deposition (PECVD) method employing a silicon source material comprising an organosilane, preferably methylsilane, along with an oxidant source material, preferably nitrous oxide.
Finally, Ye et al., in U.S. Pat. No. 6,080,529, disclose a method for forming within a microelectronic fabrication a patterned mask layer which after being employed as an etch mask for forming a patterned conductor layer from a blanket conductor layer within the microelectronic fabrication may be readily removed from over the patterned conductor layer without leaving a residue. In order to realize the foregoing result, the method employs a multi-layer patterned mask layer formed over a blanket conductor layer which is desired to be patterned to form the patterned conductor layer, wherein the multi-layer patterned mask layer employs formed closer to the blanket conductor layer a patterned first mask layer formed of a high temperature organic material, such as amorphous carbon, in turn having formed thereupon a patterned second mask layer formed of either an inorganic mateiral or a photoimageable high temperature organic material, such as a plasma polymerized methyl silane (PPMS).
Desirable in the art of microelectronic fabrication are additional methods and materials which may be employed for forming within microelectronic fabrications microelectronic dielectric layers formed of carbon doped silicon containing dielectric materials, such as carbon doped silicon oxide dielectric materials, having comparatively low dielectric constants, but also with enhanced adhesion when employed as microelectronic substrate layers upon which may be formed additional layers within a microelectronic fabrication.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for forming a carbon doped silicon containing dielectric layer within a microelectronic fabrication.
A second object of the present invention is to provide a method in accord with the first object of the present invention, wherein the carbon doped silicon co
Jang Syun-Ming
Jeng Shwang-Ming
Li Lain-Jong
Yu Chen-Hua
Clark Sheila V.
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
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