Global I/O timing adjustment using calibrated delay elements

Details Global I/O timing adjustment using calibrated delay elements Global I/O timing adjustment using calibrated delay elements

2007-03-27

2007-03-27

Perveen, Rehana (Department: 2116)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

C713S400000

Reexamination Certificate

active

09965223

ABSTRACT:
A method transfers a signal from a transmitting device to a receiving device. The signal is output from the transmitting device using a driving circuit. A reference clock signal is received in the transmitting device. An output clock signal is generated according to the received reference clock signal and a feedback clock signal in a phase locked loop. A delay is provided in a path of the reference clock signal and a path of the feedback clock signal. The delay is configured to make the output signal meet a predetermined valid data timing requirement.

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