Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2000-09-29
2004-06-01
Lee, Thomas (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S400000, C713S401000, C713S500000, C713S501000, C714S724000, C714S798000, C714S799000
Reexamination Certificate
active
06745337
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to signal transmissions, and in particular, to a glitch detection circuit for a single strobe interface.
2. Description of the Related Art
In computer systems, source synchronous interfaces may be used to increase the speed of communication between components, such as processors, memories and I/O devices. Generally, there are two types of source synchronous interfaces, namely a differential strobe scheme and a single strobe scheme. In a differential strobe source synchronous interface, data or address signals are sent from a transmitter to a receiver are accompanied by a pair of complementary strobe signals.
Alternatively, in a single strobe source synchronous interface, data or address signals are accompanied by a single strobe signal. The strobe is a signal used by a receiver to latch the accompanying address or data, or for other timing purposes. Typically, both strobe transitions, rising and falling, are used, in the single strobe scheme, by the receiver to identify and latch the correct packet of data. Thus, during the first transition of strobe signal (e.g., rising), the receiver will latch the first packet of data, and during the second transition of strobe signal (e.g., falling), the receiver will latch the next packet of data, and so on.
Occasionally, strobe signals of single strobe source synchronous interfaces may experience glitches that can cause problems in a computer system, since the glitch may latch onto invalid address or data. Typically, if a failure or error occurs due to a glitch on the strobe signal, it is difficult to identify the cause and time of error. Currently, there is no effective way in which a glitch on a single strobe interface can be detected.
REFERENCES:
patent: 4453229 (1984-06-01), Schaire
patent: 4578666 (1986-03-01), Anderson
patent: 6094376 (2000-07-01), Park et al.
patent: 6115322 (2000-09-01), Kanda et al.
patent: 6401225 (2002-06-01), Miura
patent: 6530029 (2003-03-01), Metchev
patent: 6552945 (2003-04-01), Cooper et al.
patent: 62128643 (1987-06-01), None
Park, H.-C. et al.; “A 833 Mbps 2.5 V 4 Mb double data rate SRAM”, Solid-State Circuits Conference, 1998. Digest of Technica Papers. 45th ISSCC 1998 IEEE International , Feb. 5-7, 1998, Page(s): 356-357, 464.
Rajappa Srinivasan
Trivedi Romesh B.
Intel Corporation
Lee Thomas
Trujillo James K.
LandOfFree
Glitch detection circuit for outputting a signal indicative... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Glitch detection circuit for outputting a signal indicative..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Glitch detection circuit for outputting a signal indicative... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3339436