Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-09-11
2000-02-29
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438232, 438306, 438515, H01L 218238
Patent
active
06030863&
ABSTRACT:
A method for forming salicide contacts and polycide conductive lines in integrated circuits is described which employs the ion implantation of both germanium and arsenic into polysilicon structures and into source/drain MOSFET elements is described. The method is particularly beneficial in the manufacture of sub-micron CMOS integrated circuits. Germanium is implanted into the polysilicon and into the source/drain surfaces forming a amorphized surface layer. Next a low dose, low energy arsenic implant is administered into the amorphized layer. The low dose shallow arsenic implant in concert with the amorphized layer initiates a balanced formation of titanium suicide over both NMOS and PMOS devices in CMOS integrated circuits without degradation of the PMOS devices with an accompanying reduction of gate-to-source/drain shorts. Amorphization by the electrically neutral germanium ions permits the use of a lower dose of arsenic than would be required if arsenic alone were implanted. The combined amorphization effect of the germanium and arsenic implants also facilitates a suicide phase transition on sub-micron wide polycide lines thereby improving their conductivity.
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Chang Shou-Zen
Lin Cheng Kun
Tsai Chaochieh
Yang Chi Ming
Ackerman Stephen B.
Lattin Christopher
Niebling John F.
Saile George O.
Taiwan Semiconductor Manufacturing Company
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