Generation of pulse signals from a clock signal

Details Generation of pulse signals from a clock signal Generation of pulse signals from a clock signal

2005-05-17

2005-05-17

Elamin, A. (Department: 2116)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

C713S400000, C713S500000, C713S501000, C327S161000, C327S276000, C331S011000, C369S059220

Reexamination Certificate

active

06895523

ABSTRACT:
Two first delay signals Q30and Q34are generated such that edges thereof are delayed by a first delay time Td1in relation to the rising edge of a clock signal CLK. Two second delay signals Q32and Q36are also generated such that edges thereof are delayed by a second delay time Td2in relation to the trailing edge of the clock signal CLK. A pulse signal Sout is generated as a result of logic operations performed on the first delay signals Q30and Q34and the second delayed signals Q32and Q36.

REFERENCES:
patent: 5357196 (1994-10-01), Ito
patent: 6373307 (2002-04-01), Takai
patent: 6526468 (2003-02-01), Larochelle et al.
patent: 6618338 (2003-09-01), Fujiwara et al.
patent: 6727740 (2004-04-01), Kirsch
patent: 6803826 (2004-10-01), Gomm et al.

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