Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-11
2010-10-26
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C714S724000
Reexamination Certificate
active
07823100
ABSTRACT:
A method, system and apparatus for constructing a comprehensive test plan for a design under test (DUT) using a case analysis graph is provided. Embodiments of the present invention provide for automatically generating test cases of the test plan from the case analysis graph by traversing paths through the case analysis graph to select a sequence of components to be exercised by a DUT. Selection of the components is constrained by one or more rules. The rules, in aspects of the invention, provide for selection of specified components to be included in the sequence of components.
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Flatau Arthur D.
Hamid Adnan A.
Breker Verification Systems, Inc.
Campbell Stephenson LLP
Do Thuan
Geld Jonathan N.
Nguyen Nha T
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