Generating and controlling analog and digital signals on a...

Data processing: measuring – calibrating – or testing – Testing system – Signal generation or waveform shaping

Reexamination Certificate

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C702S122000, C702S123000

Reexamination Certificate

active

06512989

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to the field of automated electronic test systems for testing integrated circuits. More particularly, the present invention relates to generating and controlling analog and digital signals on an electronic tester platform that includes analog and digital resources.
BACKGROUND
Automated test systems, also known as automatic test equipment (“ATE”) or “testers,” have been widely used in semiconductor and electronics manufacturing processes. Semiconductor integrated circuits are generally tested at least once during manufacturing processes. In most instances, a semiconductor is fabricated on a silicon substrate and tested at the wafer level. The semiconductor is then packaged and a final test is conducted prior to delivery to the customer, for example.
The various kinds of semiconductor integrated circuits (“ICs”) requiring such testing include analog ICs, digital ICs, and mixed signal ICs. Examples of analog ICs include amplifiers, voltage regulators, clock circuits, and phase lock loops. Digital ICs include high-speed very large scale integrated (“VLSI”) circuits such as microprocessors, microcontrollers, and digital signal processors, for example. Mixed signal ICs combine analog and digital functionality on a single semiconductor substrate or “chip.” Examples of mixed signal ICs include digital-to-analog converters (“DACs”), analog-to-digital converters (“A/D converters”), and coder-decoders (“CODECs”), for example.
Testing mixed signal ICs on ATEs presents many unique challenges that are not present when testing either analog or digital ICs alone. For example, when testing a DAC it is necessary to apply a digital representation of an analog waveform at the digital inputs of the device under test (“DUT”), and then measure and perform calculations on the analog output. Conversely, when testing A/D converters it is necessary to transmit an analog signal to the analog inputs of the DUT and measure a digital representation of the analog signal appearing at the outputs. In order to obtain proper test results, there must be a high degree of synchronization between the digital and analog resources of the ATE.
FIG. 1
shows one example of an ATE architecture. The ATE includes a network interface computer (“NIC”)
101
to oversee the various tester resources. An enVision++ executive system
103
is the operating environment for the ATE. Cadence™
105
is the executive system for tester controller
111
. Cadence is also the name for the computer language for writing analog test programs. Therefore, enVision++ and the Cadence subsystem comprise the ATE system control software. NIC
101
is connected to tester controller
111
and test process accelerator
113
via bus adapter
121
and bus
109
. Test process accelerator is connected to digital resources
171
,
173
, and
175
through bus adapters
123
and
125
. Tester controller
111
is connected to analog resources
181
,
183
, and
185
through bus adapter
127
. Action packet
130
is sent from test controller
111
to the analog resources
181
,
183
, and
185
to perform analog testing. Similarly, test process accelerator sends a signal over bus adapters
123
and
125
to perform digital testing. Both the digital and the analog resources are connected to test head
150
. Mixed signal testing is implemented by providing the analog and digital resources with the necessary control information so that the resources can transmit and receive the digital and analog signals required by the DUT
151
with the proper degree of synchronization.
To perform mixed signal IC testing, a programmer is required to specify analog and digital test waveforms using the ATE system control software. Analog tests require the programmer to specify various settings on the analog instruments using an ASCII based programming language such as Cadence™. Digital testing, on the other hand, requires the utilization of long sequentially executed streams of digital data known as “test vectors” or “patterns.” For mixed signal testing, patterns are typically created by a programmer via graphical interaction with the system development tools provided, such as enVision++. Difficulty arises because the analog and digital waveforms are generated by different subsections of the ATE. Additionally, analog signal generation and digital signal generation has also traditionally been conceptualized in different terms. Therefore, in order to develop a mixed signal test program, programmers are required to understand the complex interaction between the digital and analog resources as the test program is executing a mixed signal test. This results in an increase in the development cycle time for a given test program. Simplification of the relationship between the analog and digital waveforms would result in reducing the amount of time required for a programmer to develop a test program. This is desirable because it would decrease development cycles and allow semiconductor manufacturers to release products to market in a shorter period of time.
One example of a prior art approach to mixed signal IC testing was to specify analog and digital test waveforms independently. For example, the main test program is defined using the enVision++ executive system. The main program is comprised of a sequence of digital test routines, referred to as digital test methods, and analog test routines (Cadence procedures).
FIG. 2
shows how digital waveforms are defined using the Waveform Tool
200
. Digital waveforms for each pin or pin group associated with the DUT are defined by the programmer. Once defined, the programmer assigns each digital waveform a corresponding signal representation. For example, in
FIG. 2
the waveform for the DATA_IN pin group is assigned a signal representation of n/N, and the waveform for the DATA_OUT pin group is assigned a signal representation of L/H.
FIG. 3
shows how the digital waveforms defined using the Waveform Tool are used by the Pattern Tool
300
to create test patterns. The programmer first defines the header. The header is used to associate the columns of the pattern to particular digital pins located in the digital resources. The programmer then uses the signal representations to define the pattern. The pattern shown in
FIG. 3
is used to control a strobe pin SB, an inhibit pin IH, four data input pins D
1
-D
4
, and sixteen data output pins S
0
-S
15
, for example. As each row of the pattern is sequentially executed, each signal representation is interpreted by the ATE and is assigned to the digital waveform defined by the Waveform Tool. The digital resources then produce the desired waveform at the pin corresponding to the column in which each signal representation is located. In this manner the digital resources of the ATE are capable of transmitting and receiving long streams of synchronized digital data.
FIG. 4
shows an example of a graphical user interface
350
for the Cadence debugger. Cadence is a full featured line-by-line compiled test language designed specifically for writing and debugging of Cadence procedures for analog testing. Analog waveforms are defined using the predefined Cadence setup instructions. The programmer uses the Cadence setup instructions to configure the analog resources to provide analog source and measure functionality. By changing the setup instructions the programmer is able to change the frequency, amplitude, and sample rate of the analog signals being transmitted and received by the analog resources of the ATE.
Prior art mixed signal testing is accomplished by linking the digital test methods and the Cadence procedures in the main program. This is accomplished by adding microcode in the digital pattern that sends a signal or triggers an event in the analog instrumentation. This provides a high degree of coupling between the digital and analog systems. However, this method has the disadvantage of making it difficult for the program developer to understand how the separate sections of the program interrelate. In othe

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