Gated diode with non-planar source region

Details Gated diode with non-planar source region Gated diode with non-planar source region

2007-04-02

2010-06-08

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S288000, C257SE29039, C257SE29131, C257SE29195, C257SE29279, C438S286000, C438S300000

Reexamination Certificate

active

07732877

ABSTRACT:
A gated-diode semiconductor device or similar component and a method of fabricating the device. The device features a gate structure disposed on a substrate over a channel and adjacent a source and a drain. The top of the source or drain region, or both, are formed so as to be at a higher elevation, in whole or in part, than the bottom of the gate structure. This configuration may be achieved by overlaying the gate structure and substrate with a profile layer that guides a subsequent etch process to create a sloped profile. The source and drain, if both are present, may be symmetrical or asymmetrical. This configuration significantly reduces dopant encroachment and, as a consequence, reduces junction leakage.

REFERENCES:
patent: 5956590 (1999-09-01), Hsieh et al.
patent: 6825528 (2004-11-01), Iwata et al.
patent: 7170130 (2007-01-01), Fang et al.
patent: 7355262 (2008-04-01), Ko et al.
patent: 2003/0089932 (2003-05-01), Iwata et al.
patent: 2006/0033128 (2006-02-01), Chi
patent: 2007/0090408 (2007-04-01), Majumdar et al.

Affiliated with

Also associated with

Rating

Gated diode with non-planar source region does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Gated diode with non-planar source region, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Gated diode with non-planar source region will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4192153