Gate with dual gate dielectric layer and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S330000

Reexamination Certificate

active

07115477

ABSTRACT:
A gate with dual gate dielectric layer and fabrication method thereof. A semiconductor substrate is provided, on which a dielectric layer and a patterned hard mask layer with an opening are sequentially formed. A spacer is formed on a sidewall of the opening. The semiconductor substrate is ion implanted, the spacer and the exposed dielectric layer are removed, and a gate oxide layer is formed on the bottom of the opening.

REFERENCES:
patent: 5801075 (1998-09-01), Gardner et al.
patent: 6169003 (2001-01-01), Hu et al.
patent: 6287926 (2001-09-01), Hu et al.
patent: 6346438 (2002-02-01), Yagishita et al.

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