Gate structures in semiconductor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S321000, C257SE29300

Reexamination Certificate

active

07928498

ABSTRACT:
A gate structure includes an insulation layer on a substrate, a first conductive layer pattern on the insulation layer, a metal ohmic layer pattern on the first conductive layer pattern, a diffusion preventing layer pattern on the metal ohmic layer pattern, an amorphous layer pattern on the diffusion preventing layer pattern, and a second conductive layer pattern on the amorphous layer pattern. The gate structure may have a low sheet resistance and desired thermal stability.

REFERENCES:
patent: 5247198 (1993-09-01), Homma et al.
patent: 5349221 (1994-09-01), Shimoji
patent: 7101777 (2006-09-01), Ho et al.
patent: 2005/0110058 (2005-05-01), Hu
patent: 2006/0027882 (2006-02-01), Mokhlesi
patent: 2007/0001246 (2007-01-01), Lim et al.
patent: 10-0673902 (2007-01-01), None
patent: 10-0681211 (2007-02-01), None

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