Gate structure and a transistor having asymmetric spacer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21626, C257SE21640

Reexamination Certificate

active

07354839

ABSTRACT:
Methods for forming asymmetric gate structures comprising spacer elements disposed on the opposed sides of a gate electrode and having a different width are disclosed. The asymmetric gate structures are employed to form an asymmetric design of a halo region and extension regions of a field effect transistor using a symmetric implantation scheme, or to further enhance the effectiveness of asymmetric implantation schemes. The transistor performance may be significantly enhanced for a given basic transistor architecture. In particular, a large overlap area may be created at the source side with a steep concentration gradient of the PN junction due to the provision of the halo region, whereas the drain overlap may be significantly reduced or may even be completely avoided to further enhance the transistor performance.

REFERENCES:
patent: 6794256 (2004-09-01), Fuselier et al.
patent: 2007/0072382 (2007-03-01), Yamamoto et al.
patent: 100 11 885 (2001-11-01), None

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