Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-04-19
2011-04-19
Tran, Minh-Loan T (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S412000, C257S413000, C257S900000, C257SE29135
Reexamination Certificate
active
07928482
ABSTRACT:
A gate structure includes a gate insulation layer pattern, a gate electrode, a first spacer and a protecting layer pattern. The gate insulation layer pattern is on a substrate. The gate electrode is on the gate insulation layer pattern, the gate electrode including a lower portion having a first width, a central portion having a second width smaller than the first width and an upper portion having a third width. The first spacer is on a lower sidewall of the gate electrode. The protecting layer pattern is on a central sidewall of the gate electrode.
REFERENCES:
patent: 6566236 (2003-05-01), Syau et al.
patent: 2004/0129959 (2004-07-01), Kim et al.
patent: 2004/0150048 (2004-08-01), Usui et al.
patent: 2006/0030091 (2006-02-01), Kuan et al.
patent: 1019990024350 (1999-04-01), None
Kim Jong-Pyo
Sun Min-Chul
Cruz Leslie Pilar
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
Tran Minh-Loan T
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