Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-03-19
2010-10-12
Pham, Thanh V (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S412000, C257S413000
Reexamination Certificate
active
07812400
ABSTRACT:
A semiconductor structure with reduced inter-diffusion is provided. The semiconductor structure includes a semiconductor substrate; a first well region in the semiconductor substrate; a second well region in the semiconductor substrate; an insulating region between and adjoining the first and the second well regions; a gate dielectric layer on the first and the second well regions; and a gate electrode strip on the gate dielectric and extending from over the first well region to over the second well region. The gate electrode strip includes a first portion over the first well region, a second portion over the second well region, and a third portion over the insulating region. A thickness of the third portion is substantially less than the thicknesses of the first and the second portions.
REFERENCES:
patent: 5633523 (1997-05-01), Kato
patent: 5882965 (1999-03-01), Schwalke et al.
patent: 2005/0176193 (2005-08-01), Kang et al.
Yu et al., 1995, “Robust n+/p+ Dual-Gate CMOS Device Fabrication Using Dopant Drive-Out Technique”, EDMS, pp. 5-2-5-5-2-8.
S. Wolf, 1995, Silicon Processing for the VLSI Era vol. 3—The Submicron MOSFET, pp. 530-531 section 8.1.4 and p. 367 section 6.5.
S. Wolf, 1995, Silicon Processing for the VLSI Era vol. 3—The Submicron MOSFET, p. 367-368 section 6.5.
Yu et al. (“Robust n+/p+ Dual-Gate CMOS Device Fabrication Using Dopant Drive-Out Technique”, 1994 EDMS, pp. 5-2-5-5-2-8, from hereinafter “Yu”).
Fernandes Errol
Pham Thanh V
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
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