Gate dielectric structure for reducing boron penetration and...

Details Gate dielectric structure for reducing boron penetration and... Gate dielectric structure for reducing boron penetration and...

2006-07-25

2006-07-25

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C257S411000

Reexamination Certificate

active

07081419

ABSTRACT:
The present invention provides a semiconductor device capable of substantially retarding boron penetration within the semiconductor device and a method of manufacture therefor. In the present invention the semiconductor device includes a gate dielectric located over a substrate of a semiconductor wafer, wherein the gate dielectric includes a nitrided layer and a dielectric layer. The present invention further includes a nitrided transition region located between the dielectric layer and the nitrided layer and a gate located over the gate dielectric.

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Parent case U.S. Appl. No. 09/605,931 entitled “A Novel Gate Dielectric Structure for Reducing Boron Penetration and Current Leakage,” to Yuan Chen, et al., filed on Jun. 28, 2000 currently pending.

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