Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-11-20
2007-11-20
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S591000, C257SE21639
Reexamination Certificate
active
11043619
ABSTRACT:
A CMOS device is provided which comprises (a) a substrate (103); (b) a gate dielectric layer (107) disposed on the substrate, the gate dielectric comprising a metal oxide; (c) an NMOS electrode (105) disposed on a first region of said gate dielectric; and (d) a PMOS electrode (115) disposed on a second region of said gate dielectric, the PMOS electrode comprising a conductive metal oxide; wherein the surface of said second region of said gate dielectric comprises a material selected from the group consisting of metal oxynitrides and metal silicon-oxynitrides.
REFERENCES:
patent: 6821833 (2004-11-01), Chou et al.
patent: 6974764 (2005-12-01), Brask et al.
patent: 2003/0100155 (2003-05-01), Lim et al.
Kunii, Yasuo et al.; “Energy-Saving Semiconductor Thin Film Technology”; Toyama Works, Semiconductor Equipment Division, Hitachi Kokusai Electric, Inc.; pp. 1-9, no date.
Kumar, Kiran et al.; “Optimization of sub 3 nm gate dielectrics grown by rapid thermal oxidation in a nitric oxide ambient”; Appl. Phys. Lett. 70(3), Jan. 20, 1997; pp. 384-386.
Sugiyama, Yoshihhiro et al; Approaches to Using Al2O3and HfO2as Gate Dielectrics for CMOSFETs; FUJITSU Sci. Tech Journal, 39(1); Jun. 2003, pp. 94-105.
Kaneta, Chioko et al; “Nano-Scale Simulation for Advanced Gate Dielectrics”, FUJITSU Sci. Tech. Journal 39(1), Jun. 2003; pp. 106-118.
Ogawa, Unryu et al.; “Plasma Oxidation and Nitridation System for 90- to 65- nm Node Processes”; Hitachi Review vol. 52 (2003), No. 3; pp. 161-165.
Gopalan, S. et al.; “Electrical and physical characteristics of ultrathin hafnium silicate films with polycrystalline silicon and TaN gates”; Applied Physics Letters, vol. 80, No. 23, Jun. 10, 2002; pp. 4416-4418.
Lucovsky, G.; “Ultrathin nitrided gate dielectrics: Plasma processing, chemical characterization, performance, and reliability”; IBM J. Res. Develop., vol. 43 No. 3, May 3, 1999; pp. 301-326.
Ghung, H.Y.A. et al.; “RTP-Grown Oxynitride Layers Meet Gate Challenges”; www.reed-electronics.com/semiconductor/article/CA446653; Jan. 15, 2005; 9 pages.
Adetutu Olubunmi O.
Triyoso Dina H.
Chaudhari Chandra
Fortkort John A.
Fortkort & Houston P.C.
Freescale Semiconductor Inc.
LandOfFree
Gate dielectric and metal gate integration does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Gate dielectric and metal gate integration, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Gate dielectric and metal gate integration will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3844848