Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-09-05
2006-09-05
Chen, Jack (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S248000, C438S386000
Reexamination Certificate
active
07101755
ABSTRACT:
A method for processing a semiconductor device includes providing the semiconductor device including a deep trench transistor in an array area and a shallow trench isolation oxide in a support area, wherein a pad oxide and pad nitride are sequentially formed on a semiconductor substrate. The method includes stripping the pad nitride, depositing an array top oxide layer over the pad oxide formed on the semiconductor substrate in the array area and the support area, and planarizing the array top oxide to a top of the shallow trench isolation oxide in the support area and to a deep trench poly stud of the deep trench transistor in the array area. The method further includes forming a wordline stack comprising a nitride layer, a gate conductor and an insulator, and etching the array top oxide, forming a passing wordline bridge through the array area supported on the shallow trench isolation oxide.
REFERENCES:
patent: 6635526 (2003-10-01), Malik et al.
Chen Jack
Edell Shapiro & Finnan LLC
Infineon - Technologies AG
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