Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2003-05-06
2004-02-17
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S221000, C438S296000, C438S427000, C438S435000, C438S780000
Reexamination Certificate
active
06693050
ABSTRACT:
CROSS-REFERENCES TO RELATED APPLICATIONS
This application is related to concurrently filed and commonly assigned patent application No. 10/430/942; filed May 6, 2003, entitled “MULTISTEP CURE TECHNIQUE FOR SPIN-ON-GLASS FILMS,” having Zhenjiang Cui, Rick J. Roberts, Michael S. Cox, Jun Zhao, Khaled Elsheref and Alex Demos listed as co inventors. The 10/430,942 application is assigned to Applied Materials Inc., the assignee of the present invention, and is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
One of the most popular techniques of isolating adjacent active devices in modern integrated circuits is referred to as shallow trench isolation (STI). Such isolation techniques generally etch shallow trenches in the silicon substrate, fill the etched trenches with a dielectric material and then planarize the structure back to the silicon surface in the areas outside the trench. Active devices can then be built in the spaces or islands between the isolation regions.
FIGS. 1A-1D
are simplified cross-sectional views of a partially completed integrated circuit illustrating a common STI formation process formed on a silicon substrate
10
. Referring to
FIG. 1A
, a typical shallow trench isolation structure is created by first forming a thin pad oxide layer
12
over the surface of substrate
10
and then forming a silicon nitride layer
14
over pad oxide layer
12
. The nitride layer acts as a hard mask during subsequent photolithography processes and the pad oxide layer provides adhesion of the nitride to the silicon substrate and protects the substrate when the nitride layer is removed near the end of the STI formation process.
Next, as shown in
FIG. 1B
, a series of etch steps are performed using standard photolithography techniques to pattern the nitride and oxide layers and form trenches
20
in silicon substrate
10
. The photoresist (not shown) is then removed and a trench lining layer
16
, such as an in situ steam generation (ISSG) oxide or other thermal oxide layer or a silicon nitride layer, is usually formed.
Referring to
FIG. 1C
, trenches
20
are then filled with an insulating material, such as gapfill silicon oxide layer
22
, using a deposition process that has good gapfill properties. One or more additional steps including chemical mechanical polishing (CMP) are then used to remove nitride layer
14
and pad oxide layer
12
and level the gapfill oxide
22
to the top of the trench (surface
24
) as shown in FIG.
1
D. The remaining insulating oxide in the trenches provides electrical isolation between active devices formed on neighboring islands of silicon.
Most integrated circuits include some regions that are isolated by relatively narrow trenches, e.g., in the active areas
26
shown in
FIGS. 1B-1D
, along with some regions that are isolated by much wider trenches, e.g., in open areas
28
, that may be an order of magnitude or more wider than trenches in the active areas. Additionally, the narrow-width trenches used in many integrated circuits have very high aspect ratios making the filling of trenches
20
one of the most challenging gapfill applications in the formation of the integrated circuit. The presence of both high-aspect-ratio, narrow-width trenches and relatively wide trenches in different parts of the silicon substrate make the filling of the trenches even more challenging.
A variety of different gapfill techniques have been developed to address such situations. Despite the many successes achieved in this area, semiconductor manufacturers are continuously researching alternative techniques to fill such gaps as well as improved techniques to fill the even more aggressive aspect ratio gaps that will likely be required in future processes.
BRIEF SUMMARY OF THE INVENTION
Embodiments of the present invention deposit an insulating material that can be used to fill trenches or gaps between adjacent raised features. The techniques of the invention are particularly useful for filling trenches associated with shallow trench isolation structures in integrated circuits but can be used in a variety of other applications including, but not limited to, the formation of premetal and intermetal dielectric layers in integrated circuits.
In one embodiment a method of filling a plurality of trenches etched in a substrate is disclosed. The method includes depositing a layer of spin-on glass (SOG) material over the substrate and into the plurality of trenches; exposing the layer of spin-on glass material to a solvent; curing the layer of spin-on glass material; and depositing a layer of silica glass over the cured spin-on glass layer using a chemical vapor deposition technique.
In another embodiment the method includes depositing a layer of spin-on glass material over the substrate and into the plurality of trenches; curing the layer of spin-on glass material by exposing the spin-on glass material to electron beam radiation at a first temperature for a first period and subsequently exposing the spin-on glass material to an electron beam at a second temperature for a second period, where the second temperature is greater than the first temperature. The method concludes by depositing a layer of silica glass over the cured spin-on glass layer using a chemical vapor deposition technique.
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Cox Michael S.
Cui Zhenjiang
Roberts Rick J.
Zhao Jun
Applied Materials Inc.
Ghyka Alexander
Townsend & Townsend & Crew
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