Gap fill for high aspect ratio structures

Details Gap fill for high aspect ratio structures Gap fill for high aspect ratio structures

2003-05-20

2004-09-07

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S778000, C438S787000, C438S791000, C438S792000, C438S798000

Reexamination Certificate

active

06787483

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to electronic device fabrication processes and associated apparatus. More specifically, the invention relates to chemical vapor deposition processes for forming dielectric layers in high aspect ratio, narrow width recessed features.
It is often necessary in semiconductor processing to fill a high aspect ratio gaps with insulating material. This is the case for shallow trench isolation, inter-metal dielectric layers, passivation layers, etc. As device geometries shrink and thermal budgets are reduced, void-free filling of high aspect ratio spaces (e.g., AR>3.0:1) becomes increasingly difficult due to limitations of existing deposition processes.
Most deposition methods either deposit more material on the upper region than on the lower region of a side-wall or form cusps at the entry of the gap. As a result the top part of a high aspect ratio structure sometimes closes prematurely leaving voids within the gap's lower portions. This problem is exacerbated in small features. Furthermore, as aspect ratios increase, the shape of the gap itself can contribute to the problem. High aspect ratio gaps often exhibit reentrant features, which make gap filling even more difficult. The most problematic reentrant feature is a narrowing at the top of the gap. Thus, the etched side-walls slope inward near the top of the gap. For a given aspect ratio feature, this increases the ratio of gap volume to gap access area seen by the precursor species during deposition. Hence voids and seams become even more likely.
While some specific gap fill processes such as TEOS/ozone SACVD (sub atmospheric chemical vapor deposition) deposited BPSG provide generally good results, such processes are expiring due to incompatibility with the advanced device constraint of a maximum thermal budget of 700° C.
Going forward, the deposition of silicon dioxide assisted by high-density plasma chemical vapor deposition (HDP CVD)—a directional (bottom-up) CVD process—is the method of choice for high aspect ratio gap-fill. The method deposits more material at the bottom of a high aspect ratio structure than on its side-walls. It accomplishes this by directing charged dielectric precursor species downward, to the bottom of the gap. Thus, HDP CVD is not an entirely diffusion-based (isotropic) process.
Nevertheless, some overhang still results at the entry region of the gap to be filled. This results from the non-directional deposition reactions of neutral species in the plasma reactor and from sputtering/redeposition processes. The directional aspect of the deposition process produces some high momentum charged species that sputter away bottom fill. The sputtered material tends to redeposit on the side-walls. Thus, the formation of overhang cannot be totally eliminated and is inherent to the physics and chemistry of the HDP CVD process. Of course, limitations due to overhang formation become ever more severe as the width of the gap to be filled decreases, the aspect ratio increases, and the features become reentrant.
To improve fabrication of advanced technology devices, the art requires better dielectric deposition processes that can fill high aspect ratio features of narrow width, without leaving gaps.
SUMMARY OF THE INVENTION
This invention addresses that need by providing hydrogen as a process gas in a high density plasma CVD process. This process has been found to provide void free high-quality gap filling with dielectric materials. These benefits occur even in very narrow, high aspect ratio features.
One aspect of the invention provides a method of filling gaps on a semiconductor substrate. The method may be characterized by the following sequence: (a) providing a substrate in a process chamber of a high density plasma chemical vapor deposition reactor; (b) introducing a process gas including at least hydrogen into the process chamber, and (c) applying a bias to the substrate. This method will effectively grow a dielectric film on the semiconductor substrate via HDP CVD. This process effectively fills gaps having widths of less than about 1.5 micrometer.
The process gas preferably provides hydrogen at a flow rate of at least about 400 sccm. This value is based on a 200 millimeter substrate. Larger substrates may require correspondingly higher flow rates. The inventors have found that hydrogen flow rates in this regime provide significantly reduced side-wall dielectric redeposition during HDP CVD.
In an alternative preferred embodiment, the substrate is heated to a temperature of between about 300 and 600° C. and held in this temperature range during the deposition process. While improved results from hydrogen addition are present over a much wider range of temperatures, this temperature range in particular has been found to provide superior results.
In yet another preferred embodiment, the process gas contains substantially no noble gas (e.g., argon, helium, and/or xenon) In many conventional systems, noble gases are used as carrier gases for HDP CVD. Note that while many embodiments of this invention do in fact employ noble carrier gases, certain preferred embodiments require no noble gas.
To deposit dielectric, the carrier gas should include one or more dielectric precursors. In many commercially important embodiments, the dielectric is a silicon oxide or related material. For these embodiments, the process gas includes a volatile silicon-containing precursor, in addition to the hydrogen gas. Examples of such silicon-containing precursors include SiH
4
, SiF
4
, Si
2
H
6
, TEOS, TMCTS, OMCTS, methyl-silane, dimethyl-silane, 3MS, 4MS, TMDSO, TMDDSO, DMDMS and mixtures thereof. During deposition, the process decomposes the silicon-containing reactant to allow plasma phase reacting of the silicon-containing gas on the surface of the substrate.
To form silicon oxides, the process gas should also include a source of oxygen. Some silicon-containing precursors have some covalently bound oxygen (e.g., TEOS). However, additional oxygen is typically required, even for the oxygen-containing precursors. Hence, the process gas typically includes elemental oxygen or some other source of atomic oxygen such as nitrous oxide or nitric oxide.
To tailor the characteristics of the dielectric) various dopants or other modifiers may be provided. Examples of dopants include boron and phosphorus. The processes of this invention may provide these dopants via volatile phosphorus-containing process gases and/or volatile boron-containing process gases. The dielectric may also comprise a silicon oxynitride and/or a silicon oxyfluoride. Such materials may be made via processes of this invention that employ nitrogen-containing precursors (e.g., N
2
, N
2
O, NO, NH
3
, NF
3
) and/or fluorine-containing precursors.
The detailed description below will further discuss the benefits and features of this invention.


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Huang et al., “Surface Treatment of Low-K SiOF to Prevent Metal Interaction,” Pub No. US 2001/0044203, Pub Date Nov. 22, 2001, 6 Pages.

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