Metallurgical apparatus – Means treating solid metal – By contact with gas
Reexamination Certificate
2000-12-01
2002-10-15
Kastler, Scott (Department: 1742)
Metallurgical apparatus
Means treating solid metal
By contact with gas
C432S214000
Reexamination Certificate
active
06464930
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to apparatus for manufacturing a semiconductor device. More particularly, the present invention relates to the furnace of an apparatus for processing a wafer in the manufacturing of a semiconductor device.
2. Brief Description of the Related Art
In general, semiconductor device manufacturing processes include a chemical vapor deposition (CVD) process in which a chemical compound in a vapor state is deposited on the surface of a wafer to form a layer on the wafer. The layer serves as a dielectric or a conductor in the final semiconductor device. The CVD process is carried out in a reaction chamber and is usually classified according to the pressure at which it is carried out in the chamber, i.e., as low pressure CVD or high pressure CVD. The low pressure CVD process is carried out at a pressure of 0.1~100 Torr.
In addition to pressure, a number of operational conditions prevailing in the reaction chamber (referred to as a furnace hereinafter), such as temperature, the wafer gap and gas flow, affect the uniformity of the layer formed on the surface of the wafer by CVD. Among these conditions, the temperature in the furnace, particularly at the bottom part thereof, must be kept constant if a uniform layer is to be formed on the semiconductor wafer. However, it is difficult to maintain a constant temperature in the furnace, particularly at the bottom thereof.
In addition, just prior to the CVD process, a door of the furnace is opened to admit a wafer boat, loaded with semiconductor wafers, into the chamber. Thereafter, it takes a predetermined number of hours to increase the internal temperature of the furnace to one that is suitable for the CVD process because opening the furnace door releases heat from the furnace. Moreover, the heat produced to re-heat the furnace is not uniformly distributed therein. Therefore, problems occur such as poor uniformity in the layer formed by CVD and instability in the operational processes.
In order to solve the aforementioned problems, a plurality of quartz boards of the same size as the wafer have been installed under the wafer boat to reduce thermal loss at the bottom of the furnace. However, the installation of these boards has proven disadvantageous in terms requiring significant operational time and compromising productivity.
In order to solve the conventional problems described above, Japanese Patent No. Heisei 01-130523 proposes a bell-shaped heat treatment furnace provided with a reflector at the bottom thereof.
As shown in
FIG. 1
, the furnace comprises a heat insulation member
10
, a heater core tube
11
disposed within the heat insulation member
10
, a heat-distributing sleeve
12
, and a heater
13
.
In addition, an air supply tube
1
la extends along a lateral wall of the heater core tube
11
to the top of the heater core tube
11
for supplying reactant gas into the furnace at the top thereof. A plurality of wafers W are supported in a wafer boat
17
so as to receive the reactant gas. The wafer boat
17
is positioned on a heater cover
14
disposed under the heater core tube
11
. A plurality of heat-reflecting plates
16
are interposed between the wafer boat
17
and the heater cover
14
. Both the wafer boat
17
and the reflecting plates
16
are mounted to a rotational shaft
15
.
Furthermore, an exhaust pipe
14
a is connected to the lateral wall of the heater cover
14
. Cooling pipes
18
a
,
18
b
are located along the bottom and the top of the heater core tube
11
and the heater cover
14
, respectively. A seal
19
is interposed between the cooling pipes
18
a
,
18
b.
The heater cover
14
is raised to insert the wafer boat
17
, loaded with wafers W, and the reflecting plates
16
into the heater core tube
11
, whereupon a gap between the cooling pipes
18
a
,
18
b
is eliminated by the seal
19
. Then, the wafers W are heated to a predetermined temperature by heater
13
, and a reactant gas is supplied into the furnace via the air supply tube
11
a
. At this time, the seal
19
is kept cool by cool water that circulates through the cooling pipes
18
a
,
18
b.
However, even though the reflecting plates
16
are advantageous in that they do not require a great deal of space and yet enhance the mass production capability of the furnace, they are disadvantageous in terms of their structural stability. Specifically, the reflecting plates vibrate significantly during operation and do not satisfactorily prevent thermal loss.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the aforementioned problems of the prior art. More specifically, an object of the present invention is to provide apparatus for manufacturing a semiconductor device, which apparatus has an improved structural stability and an improved ability to prevent heat loss.
In order to accomplish the aforementioned object, the present invention provides a semiconductor manufacturing furnace having a heat blocker that includes a sealed case, a plurality of horizontally extending heat-reflecting plates disposed in the case, and a plurality of support pins for supporting and fixing the heat-reflecting plates in position to keep them from vibrating.
The heat blocker is provided between a wafer boat and an elevating plate of the furnace so as to minimize the thermal loss in the furnace that would otherwise occur during the loading of the wafer boat. The heat-reflecting plates reflect heat upwardly into the processing chamber of the furnace as the wafer boat is elevated by the elevating plate. Therefore, the internal temperature of the furnace is stabilized quickly and only a small amount of time is required to heat the furnace to the desired processing temperature after the wafer boat is loaded with the wafers to be processed, whereby the productivity of the manufacturing process and the uniformity of the processed wafers are enhanced.
REFERENCES:
patent: 5370371 (1994-12-01), Miyagi et al.
patent: 5480300 (1996-01-01), Okoshi et al.
patent: 5947718 (1999-09-01), Weaver
patent: 6005225 (1999-12-01), Kowalski et al.
patent: 2298314 (1996-08-01), None
An Jae-Hyuck
Han Hyun
Kim Tae-Chul
Yang Chang-Zip
Kastler Scott
Samsung Electronics Co,. Ltd.
Volentine & Francos, PLLC
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