Forward error correction apparatus and method in a...

Details Forward error correction apparatus and method in a... Forward error correction apparatus and method in a...

2006-11-14

2006-11-14

Torres, Joseph (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S758000

Reexamination Certificate

active

07137060

ABSTRACT:
A forward error correction method for decoding coded bits generated by low density parity check matrixes. The method comprises converting each of the coded bits into a log likelihood ratio (LLR) value, and applying the converted values to variable nodes; delivering messages applied to the variable nodes to check nodes; checking a message having a minimum value among the messages, and determining a sign of the message having the minimum value; receiving messages updated in the check nodes, adding up signs of the received messages and a sign of an initial message, applying a weighting factor of 1 when all signs are identical, and when all signs are not identical, updating a message of a variable node by applying a weighting factor; determining LLR of an initial input value; and hard-deciding values of the variable nodes, performing parity check on the hard decision values, and stopping the decoding when no error occurs.

REFERENCES:
patent: 4295218 (1981-10-01), Tanner
patent: 6539367 (2003-03-01), Blanksby et al.
patent: 6751770 (2004-06-01), Morelos-Zaragoza
patent: 7000167 (2006-02-01), Coker et al.

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