Forming lateral bipolar junction transistor in CMOS flow

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S199000, C438S202000, C438S203000, C438S316000, C438S322000, C438S327000, C438S335000

Reexamination Certificate

active

06987039

ABSTRACT:
A method of forming a lateral bipolar transistor without added mask in CMOS flow including a p-substrate; patterning and n-well implants; pattern and implant pocket implants for core nMOS and MOS; pattern and implants pocket implants I/O nMOS and pMOS; sidewall deposit and etch and then source/drain pattern and implant for nMOS and pMOS. The method includes the steps of forming emitter and collector contacts by implants used in source/drain regions; forming an emitter that includes implants done in core pMOS during core pMOS LDD extender and pocket implant steps and while the collector omits the core pMOS LDD extender and pocket implants; forming a base region below the emitter and collector contacts by the n-well region with said base region going laterally from emitter to collector being the n-well and including pocket implants; and forming base contact by said n-well region and by implants used in nMOS source/drain regions.

REFERENCES:
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patent: 5001073 (1991-03-01), Huie
patent: 5793085 (1998-08-01), Vajana et al.
patent: 5841170 (1998-11-01), Adan et al.
patent: 6001701 (1999-12-01), Carroll et al.
patent: 6303420 (2001-10-01), Sridhar et al.
patent: 6649983 (2003-11-01), Chatterjee

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