Forming embedded dielectric layers adjacent to sidewalls of...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch

Reexamination Certificate

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C257S077000, C257SE29104, C257SE29246

Reexamination Certificate

active

07928474

ABSTRACT:
A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate; an insulating region extending from substantially a top surface of the semiconductor substrate into the semiconductor substrate; an embedded dielectric spacer adjacent the insulating region, wherein a bottom of the embedded dielectric spacer adjoins the semiconductor substrate; and a semiconductor material adjoining a top edge and extending on a sidewall of the embedded dielectric spacer.

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Cam, C.L., et al., “A Low Cost Drive Current Enhancement Technique using Shallow Trench Isolation induced Stress for 45-nm node,” 2006 Symposium on VLSI Technology Digest of Technical Papers, IEEE, 2 pp.
Ge, C.-H., et al., “Process-Strained Si (PSS) CMOS Technology Featuring 3D Strain Engineering,” International Electron Devices Meeting, 2003, IEEE, pp. 73-76.

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