Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-11-22
2005-11-22
Smoot, Stephen W. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S389000
Reexamination Certificate
active
06967137
ABSTRACT:
In the course of forming the collar dielectric in a DRAM cell having a deep trench capacitor, a number of filling and stripping steps required in the prior art are eliminated by the use of a spin-on material that can withstand the high temperatures required in front-end processing and also provide satisfactory filling ability and etch resistance. The use of atomic layer deposition for the formation of the collar dielectric reduces the need for a high temperature anneal of the fill material and reduces the amount of outgassing or cracking.
REFERENCES:
patent: 6008104 (1999-12-01), Schrems
patent: 6025245 (2000-02-01), Wei
patent: 6271079 (2001-08-01), Wei et al.
patent: 6271142 (2001-08-01), Gruenign et al.
patent: 6329698 (2001-12-01), Koscielniak et al.
patent: 6670235 (2003-12-01), Tews et al.
patent: 6770563 (2004-08-01), Huang et al.
patent: 2002/0014647 (2002-02-01), Seidl et al.
patent: 2002/0036310 (2002-03-01), Lutzen
patent: 2003/0045068 (2003-03-01), Gutsche et al.
patent: 2005/0009268 (2005-01-01), Cheng et al.
Belyansky Michael P.
Divakaruni Rama
Mandelman Jack A.
Park Dae-Gyu
Lee Belinda
Smoot Stephen W.
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