Forming CMOS transistor using diffusion source and wet/dry oxida

Details Forming CMOS transistor using diffusion source and wet/dry oxida Forming CMOS transistor using diffusion source and wet/dry oxida

1997-12-22

1999-11-09

Fahmy, Wael M.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438229, 438301, 438588, 438563, 438564, 148DIG30, 148DIG123, H01L 218238

Patent

active

059813210

ABSTRACT:
A method of forming shallow junctions in a CMOS transistor is disclosed. The method comprises the steps of: (a) forming a diffusion source layer on a N-well region, a P-well region, field oxide layer, and the gates of a CMOS transistor; (b) forming a photoresist layer over the P-well region; (c) carrying out p-type ion implantation to dope a part of the diffusion source layer on the P-well region; (d) removing the photoresist layer on the P-well region; (e) forming a photoresist layer over the N-well region; (f) carrying out n-type ion implantation to dope the other part of the diffusion source layer on the N-well region; (g) removing the photoresist layer on the N-well region; and (h) oxidizing the diffusion source layer and driving the ions therein into the P-well and N-well regions to form shallow junctions, respectively. The present invention has several advantages. First, it is compatible with the conventional CMOS process. Second, it does not require additional mask steps, therefore resulting in a simple process. Third, the CMOS transistors fabricated according to the present invention have shallow junctions, which can alleviate the short channel effect and the defects due to ion implantation.

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Liu, c.T., "High-Performance CMOS. . . One-Mask Seald Diffusion-Junctions", IDEM, pp. 437-440, 93.

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