Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-12-04
2008-10-21
Tran, Long K (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S203000, C438S224000, C438S275000, C438S276000, C257S369000, C257S370000, C257S371000, C257S392000, C257S407000, C257S412000, C257SE21633, C257SE21644, C257SE21555
Reexamination Certificate
active
07439140
ABSTRACT:
Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked, and a first voltage threshold implant adjustment is performed within wells defining the second type standard Vt devices, and each of the first and second type low Vt devices. Wells that define the locations of second type standard Vt devices are masked, and a second voltage threshold implant adjustment is performed to the wells defining the first type standard Vt devices, and each of the first and second type low Vt devices. Doped polysilicon gate stacks are then formed over the wells. Performance characteristics and control of each device Vt is controlled by regulating at least one of the first and second voltage threshold implant adjustments, and the polysilicon gate stack doping.
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Helm Mark
Zhou Xianfeng
Dinsmore & Shohl LLP
Micro)n Technology, Inc.
Tran Long K
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