Formation of high voltage transistor with high breakdown...

Details Formation of high voltage transistor with high breakdown... Formation of high voltage transistor with high breakdown...

2011-03-01

2011-03-01

Pham, Thanhha (Department: 2894)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S593000, C257SE21209

Reexamination Certificate

active

07897448

ABSTRACT:
A high voltage transistor exhibiting an improved breakdown voltage and related methods are provided. For example, a method of manufacturing an integrated circuit includes etching a poly silicon layer to provide a gate stacked above a floating gate of a flash memory cell. A source and a drain of the flash memory cell are implanted in a substrate. The poly silicon layer is etched to provide a gate of a high voltage transistor. Lightly doped drain (LDD) implants are provided in source/drain regions of the high voltage transistor in the substrate. An annealing operation is performed on the integrated circuit, wherein the annealing causes each of the LDD implants to form a graded junction in relation to a channel in the substrate between the LDD regions, and further causes sidewalls to oxidize on the gates of the flash memory cell and on the gate of the high voltage transistor.

REFERENCES:
patent: 2007/0020839 (2007-01-01), Sridhar et al.

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