Floating gate nonvolatile memory with reading while writing capa

Details Floating gate nonvolatile memory with reading while writing capa Floating gate nonvolatile memory with reading while writing capa

1991-07-30

1993-09-14

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Multiplexing

365185, 365218, 36523003, G11C 700

Patent

active

052455726

ABSTRACT:
A floating gate nonvolatile memory. The memory includes a first memory array and a second memory array. A first address register is provided for storing a first address for the first memory array. A second address register is provided for storing a second address for the second memory array. A multiplexer is coupled to the first memory array and the second memory array at one end and an output of the memory device at the other end for selectively coupling one of the first memory array and the second memory array to the output at a time. Array select circuitry responsive to an incoming address is provided for selecting the first memory array for a reprogramming operation and the second memory array for a read operation. The array select circuitry directs the first address to the first address register and the second address to the second address register. The array select circuitry controls the multiplexer for coupling the second memory array to the output during the reprogramming operation of the first memory array.

REFERENCES:
patent: 4450538 (1984-05-01), Shirasaka
patent: 4835684 (1989-05-01), Kanai
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patent: 5036494 (1991-07-01), Wise et al.
patent: 5043947 (1991-08-01), Oshima et al.
S. Zales & D. Elbert, "Using Flash Memory For In-System Reprogrammable Nonvolatile Storage," Application Note AP-316, Intel Memory Components Handbook, pp. 5-72 through 5-114 (Intel Corp., Oct. 1989).

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